Triple damascene fuse

ABSTRACT

Disclosed is a conductive fuse for a semiconductor device, comprising: a pair of contact portions integrally connected to a fusible portion by connecting portions; the contact portions thicker than the connecting portions and the connecting portions thicker than the fusible portion; a first dielectric under the connecting portions and the fusible portion and extending between the pair of contact portions; and a second dielectric between the first dielectric and the fusible portion, the second dielectric extending between the connecting portions and defining the length of the fusible portion.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to the field of semiconductorintegrated circuits; more specifically, it relates to a fuse forsemiconductor integrated circuits and the method of fabricating saidfuse.

[0003] 2. Background of the Invention

[0004] Semiconductor integrated circuits include a semiconductorsubstrate containing active devices, such as transistors and diodes,passive devices, such as capacitors and resistors and interconnectionlayers formed on top of the substrate containing wires for joining theactive and passive devices into integrated circuits.

[0005] Many semiconductor devices such as logic circuits such ascomplementary metal-oxide-silicon (CMOS), Bipolar, and BiCMOS and memorydevices such as dynamic random access memory (DRAMs) and static randomaccess memory (SRAMs) are designed to be tailored after manufacture by“blowing fuses” (deleting fuses.) Tailoring includes adjusting circuitparameters and deleting failed circuit elements and replacing them withredundant circuit elements.

[0006] Fuses are usually formed from narrow wires in the interconnectionlayers designed to be opened by vaporizing a portion of the wire byeither passing an electric current through the fuse or now more commonlyby a laser pulse. Modern semiconductor integrated circuits often requiremany thousands of fuses arranged in closely spaced banks. Fuses are mostoften located in the uppermost interconnection wiring levels in order tominimize damage to adjoining structures, to minimize the thickness ofdielectric passivation covering the fuse and to allow an optically clearpath for a laser to the fuse.

[0007] Many semiconductor integrated circuits use a hierarchical wiringscheme; thin, tight pitched wiring in lower wiring levels forperformance purposes and thick, relaxed pitch wiring in higher wiringlevels for current carrying requirements. Fuses fabricated in thesehigher wiring levels being formed of thick metal require high fuseenergy to vaporize than fuses formed in thin wiring levels. Since fusesgenerally must be formed in upper levels of wiring for the reasons givenabove a difficult problem is created. The high power, for example of alaser, required to delete thick fuses can create similar collateraldamage to adjoining fuses and wires (resulting in reduced yields) aswell as create cracks and craters in the dielectric layers separatingwiring levels (resulting in reliability problems) that locating the fusein lower wiring levels can cause. Further, thick fuses must often bespaced wide apart to reduce these problems resulting in an excessivearea of the die being required for fuses.

[0008] Dielectric damage is also a great concern when low-k dielectricmaterials are used between wiring levels. Low-k dielectrics aregenerally not thermally stable, have a low modulus and can melt, deform,or collapse when subjected to thermal and mechanical stress, such asinduced by fuse blow. Examples of low-k dielectrics include spin onglass, porous silicon oxide, polyimide, polyimide siloxane,polysilsequioxane polymer, benzocyclobutene, paralyene, polyolefin,poly-naphthalene, amorphous Teflon (a fluropolymer resin), SiLK™ (apolyphenylene oligomer and described in U.S. Pat. No. 5,965,679)manufactured by Dow Chemical, Midland, Mich., Black Diamond™ (silicadoped with about 10 mole % methane), manufactured by Applied MaterialsCorp., polymer foam and aerogel. Common dielectrics include siliconoxide, silicon nitride, diamond, and fluorine doped silicon oxide.

SUMMARY OF THE INVENTION

[0009] A first aspect of the present invention is a conductive fuse fora semiconductor device, comprising: a pair of contact portionsintegrally connected to a fusible portion by connecting portions; thecontact portions thicker than the connecting portions and the connectingportions thicker than the fusible portion; a first dielectric under theconnecting portions and the fusible portion and extending between thepair of contact portions; and a second dielectric between the firstdielectric and the fusible portion, the second dielectric extendingbetween the connecting portions and defining the length of the fusibleportion.

[0010] A second aspect of the present invention is a method forfabricating a fuse for a semiconductor device, comprising: providing asubstrate; forming a first dielectric layer on a top surface of thesubstrate; forming a dielectric mandrel on a top surface of the firstdielectric layer; forming a second dielectric layer on top of themandrel and a top surface of the first dielectric layer; forming contactopenings down to the substrate in the first and second dielectric layerson opposite sides of the mandrel; removing the first dielectric layerfrom over the mandrel between the contact openings to form a trough; andfilling the trough and contact openings with a conductor.

[0011] A third aspect of the present invention is a method forfabricating a fuse for a semiconductor device, comprising: providing asubstrate; forming a first dielectric layer on a top surface of thesubstrate; forming a dielectric mandrel on a top surface of the firstdielectric layer; forming a second dielectric layer on top of themandrel and a top surface of the first dielectric layer; forming, in afirst region, contact openings down to the substrate in the first andsecond dielectric layers on opposite sides of the mandrel; removing thefirst dielectric layer from over the mandrel and the first dielectriclayer and a portion of the first dielectric layer between the contactopenings and the mandrel to form a trough and simultaneously, in asecond region, removing the first dielectric layer and a portion of thesecond dielectric to form a trench; and filling the trough and contactopenings with a conductor to form a fuse and filling the trench with theconductor to form a wire.

[0012] A fourth aspect of the present invention is a semiconductordevice, comprising: a semiconductor substrate having integratedcircuits; and at least one fuse, the fuse comprising: a pair of contactportions integrally connected to a fusible portion by connectingportions; the contact portions thicker than the connecting portions andthe connecting portions thicker than the fusible portion; a firstdielectric under the connecting portions and the fusible portion andextending between the pair of contact portions; and a second dielectricbetween the first dielectric and the fusible portion, the seconddielectric extending between the connecting portions and defining thelength of the fusible portion.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The features of the invention are set forth in the appendedclaims. The invention itself, however, will be best understood byreference to the following detailed description of an illustrativeembodiment when read in conjunction with the accompanying drawings,wherein:

[0014]FIGS. 1 through 10 are partial cross-section views illustratingthe fabrication of a triple damascene fuse is according to the presentinvention; and

[0015]FIGS. 11 through 14 are top views of alternative embodiments ofthe triple damascene fuse according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0016]FIGS. 1 through 10, are partial cross-section views illustratingthe fabrication of a triple damascene fuse is according to the presentinvention. In FIG. 1, a barrier layer 100 is formed on a substrate 105.In one example, barrier layer 100 is silicon nitride and is about 0.03to 0.10 microns thick. Formed on top of barrier layer 100 is a firstdielectric layer 110. In one example, first dielectric layer 110 issilicon oxide or fluoridated silicon oxide and is about 0.80 to 2.0microns thick. In a second example, first dielectric layer 110 is alow-k dielectric such as spin on glass, porous silicon oxide, polyimide,polyimide siloxane, polysilsequioxane polymer, benzocyclobutene,paralyene, polyolefin, poly-naphthalene, amorphous Teflon (afluropolymer resin), SiLK™ (a polyphenylene oligomer) manufactured byDow Chemical, Midland, Mich., Black Diamond™ (silica doped with about 10mole % methane), manufactured by Applied Materials Corp., polymer foamor aerogel. Formed on top of first dielectric layer 110 is a mandrellayer 115. In one example, mandrel layer 115 is silicon nitride, siliconcarbide, boron nitride or aluminum oxide and is about 0.15 to 0.50microns thick. Formed in substrate 105 is a pair of conductive wires120. Conductive wires 120 are electrically connected to circuits insubstrate 105. Conductive wires 120 comprise a core conductor 125 and aliner 130. In one example, core conductor 125 is copper and liner 130.In a second example, core conductor 125 is aluminum or aluminum-copper,aluminum-copper-silicon or aluminum alloy. In one example liner 130 isformed from, titanium, titanium nitride, tungsten, tungsten nitride,tantalum, tantalum nitride, chromium or layers thereof.

[0017] In FIG. 2, a first photolithographic process is performed to forma first photoresist pattern 135 on top of mandrel layer 115. Firstphotoresist pattern 135 is used as an etch mask to form a mandrel inmandrel layer 115 as illustrated in FIG. 3 and described below.

[0018] In FIG., 3, a first reactive ion etch (RIE) is performed andfirst photoresist pattern 135 removed to form mandrel 140. In theexample, where mandrel layer 115 is silicon nitride and first dielectriclayer 110 is silicon oxide, the first RIE process chemistry is selectedto be selective to silicon nitride over silicon oxide and comprisesabout 30 to 40 SCCM of CF₄, about 3 to 10 SCCM of O₂ and about 450 to500 SCCM of Ar.

[0019] In FIG. 4, a second dielectric layer 145 is formed on top offirst dielectric layer 110 and mandrel 140 and polished using a firstchemical-mechanical-polish (CMP) process to form a flat top surface 150.In one example, second dielectric layer is silicon oxide or fluoridatedsilicon oxide and is about 0.20 to 0.9 microns thick. In a secondexample, second dielectric layer 145 is a low-k dielectric such as spinon glass, porous silicon oxide, polyimide, polyimide siloxane,polysilsequioxane polymer, benzocyclobutene, paralyene, polyolefin,poly-naphthalene, amorphous Teflon (a fluropolymer resin), SiLK™ (apolyphenylene oligomer) (Dow Chemical, Midland, Mich.), polymer foam oraerogel. It should be understood that many spun on low-k materials (forexample, paralene's)do not require a CMP process step as they are selfplanarizing when applied.

[0020] In FIG. 5, a second photolithographic process is performed toform a second photoresist pattern 155 on top of second dielectric layer145. Second photoresist pattern 155 is used as an etch mask to form acontact hole down to conductive wires 120 as illustrated in FIG. 6 anddescribed below.

[0021] In FIG. 6, a second RIE is performed and second photoresistpattern 155 removed to form a pair of contact holes 160 in first andsecond dielectric layers 110 and 145 down to barrier layer 100. Contactholes 160 are aligned to conductive wires 120. In the example, wherebarrier layer 100 is silicon nitride and first and second dielectriclayers 110 and 145 are silicon oxide, the second RIE process chemistryis selected to be selective to silicon oxide over silicon nitride andcomprises about 15 to 45 SCCM of CF₄, about 15 to 45 SCCM of CHF₃, about3 to 10 SCCM of O₂ and about 450 to 500 SCCM of Ar. A second suitableetch chemistry comprises about 15 to 45 SCCM of C₂F₆, about 15 to 45SCCM of CH₃F, about 3 to 10 SCCM of O₂ and about 450 to 500 SCCM of Ar.

[0022] In FIG. 7, a third photolithographic process is performed to forma third photoresist pattern 165 on top of second dielectric layer 145.Third photoresist pattern 165 is used as an etch mask to form a troughin first and second dielectric layers 110 and 145 that defines thetriple damascene fuse geometry and a trench in the second dielectriclayer that defines normal last metal (LM) wiring as illustrated in FIG.8 and described below.

[0023] In FIG. 8, a third RIE is performed to form a trough 170 in firstand second dielectric layers 110 and 145 and a trench 175 in seconddielectric layer 145 and third photoresist pattern 165 is removed. Inthe example, where barrier layer 100 and mandrel 140 are silicon nitrideand first and second dielectric layers 110 and 145 are silicon oxide,the third RIE process chemistry is selected to be selective to siliconoxide over silicon nitride and comprises about 15 to 45 SCCM of CF₄,about 15 to 45 SCCM of CHF₃, about 3 to 10 SCCM of O₂ and about 450 to500 SCCM of Ar. A second suitable etch chemistry comprises about 15 to45 SCCM of C₂F₆ about 15 to 45 SCCM of CH₃F, about 3 to 10 SCCM of O₂and about 450 to 500 SCCM of Ar. All exposed second dielectric 145 isetched away but only a portion of first dielectric layer 110 is etchedaway.

[0024] These chemistries do not significantly etch silicon nitride, somost of mandrel 140 and barrier layer 100 are not removed. Mandrel 140protects the portion of second dielectric layer 145 under the mandrelfrom being etched and barrier layer 100 protects core conductor 125 fromexposure oxide RIE photoresist strip processes. Protecting coreconductor 125 is especially important when the core conductor comprisescopper and oxygen-containing RIE processes and oxygen plasma and/oroxidizing acid photoresist strip processes are used. After removal ofthird photoresist pattern 165, (assuming the barrier layer 100 andmandrel 140 are silicon nitride and first and second dielectric layers110 and 145 are silicon oxide) those portions of barrier layer 100exposed in contact holes are removed by a fourth RIE process selectiveto silicon nitride over silicon oxide which comprises about 30 to 40SCCM of CF₄, about 3 to 10 SCCM of O₂ and about 450 to 500 SCCM of Ar.Since mandrel 140 is exposed, a portion of the mandrel of approximatelythe same thickness as barrier layer 100 is also removed. Thus it ispossible to completely remove mandrel 140 depending on the relativethicknesses and etch rates of the mandrel and barrier layer 100.

[0025] In FIG. 9, a conformal liner 180 is deposited on all surfaces oftrough 170 and trench 175 as well as on a top surface 185 of seconddielectric layer 145. A core conductor 190 is deposited sufficientlythick to completely fill trough 170 and trench 175. A second CMP processis performed to remove excess liner and core conductor from top surface185 of second dielectric layer 145 and to polish a fuse 195 and a wire200 co-planer with the top surface of the second dielectric layer.

[0026] The thickness of the second dielectric layer 145 and the depth ofthe third RIE into first dielectric 110 will largely determine thethickness of wire 200. In one example, wire 200 is about 0.13 to 0.55microns thick. In a second example, wire 200 is about 0.7 to 2.0 micronsthick. In a third example, wire 200 is about 0.13 to 2.0 microns thick.

[0027] Fuse 195 includes a contact portion 205 integral with aconnecting portion 210, which is integral with a fusible portion 215.Note, if mandrel 140 was removed during the etch of barrier layer 100,fusible portion 215 would be thicker by thickness of the mandrel layer.The thickness of second dielectric layer 145 and mandrel 140 willlargely determine the thickness of fusible portion 215 of fuse 195. Thethickness of the second dielectric layer 145 and the depth of the thirdRIE into first dielectric 110 will largely determine the thickness ofconnecting portion 210. In one example, connecting portion 205 is about0.13 to 0.55 or about 0.7 to 2.0 microns thick or about 0.13 to 2.0microns thick with core conductor 190 comprising copper and with liner185 comprising a layer of about 0.01 to 0.14 microns of tantalum over alayer of about 0.005 to 0.070 microns of tantalum nitride. The totalthickness of fusible portion 215 is 0.075 to 1.5 microns thick. In asecond example, core conductor 190 comprises aluminum oraluminum-copper, aluminum-copper-silicon or aluminum alloy and liner 195comprises titanium over titanium nitride, the thickness of the layersbeing the same as for TaN/Ta/Cu example above. Other liner materialsinclude tungsten, tungsten nitride and chromium, the liner totalthicknesses being about 0.015 to 0.21 microns.

[0028] In FIG. 10, a passivation layer 220 is formed on top surface 185of second dielectric layer 145, wire 200 and fuse 195. In one example,passivation layer 220 comprises about 0.035 to 0.12 microns of siliconnitride over about 0 to 0.5 microns of silicon oxide over about 0 to 0.5microns of silicon nitride.

[0029]FIGS. 11 through 14 are top views of alternative embodiments ofthe triple damascene fuse according to the present invention. FIG. 11illustrates a first embodiment of the present invention. In FIG. 11,three fuses 225A, 225B and 225C are illustrated. Fusible portion 215 ofeach fuse 225A, 225B and 225C has a length “L” equal to the width ofmandrel 140. The width of each fusible portion is the same as the width“W1” of connecting portions 210. Mandrel 140 is common to each fuse225A, 225B and 225C. In each fuse 225A, 225B and 225C, connectingportion 210 connects fusible portion 215 to contact portion 205. Eachcontact portion 205 is in electrical contact with conductive wire(s)120. Fuses 225A, 225B and 225C are spaced a distance “S” apart. Alsoillustrated in FIG. 11, is wire 200. In one example, “L” is about 8 to20 microns, “W1” is about 0.3 to 1.8 microns and “S” is about 1 to 10microns. If a laser is used to delete fusible portion 215 comprised ofcopper, a laser with a wavelength of 1.3 microns and having a pulseduration sufficient to provide 0.5 to 3.9 micro-joules will suffice ifthe thickness of passivation layer 220 is less than about 1.1 microns.

[0030]FIG. 12 illustrates a second embodiment of the present invention.In FIG. 12, three fuses 225A, 225B and 225C are illustrated. Fusibleportion 215 of each fuse 225A, 225B and 225C has a length “L” equal tothe width of mandrel 140. Mandrel 140 is common to each fuse 225A, 225Band 225C. The width of each fusible portion “W2” is less than the width“W1” of connecting portions 210. Each fuse 225A, 225B and 225C,connecting portion 210 connects fusible portion 215 to contact portion205. Each contact portion 205 is in electrical contact with conductivewire(s) 120. Fuses 225A, 225B and 225C are spaced a distance “S” apart.Also illustrated in FIG. 12, is wire 200. In one example, “L” is about 8to 20 microns, “W2” is about 0.3 to 1.8 microns and “S” is about 1 to 10microns. If a laser is used to delete fusible portion 215 comprised ofcopper, a laser with a wavelength of 1.3 microns and having a pulseduration sufficient to provide 0.5 to 3.9 micro-joules will suffice ifthe thickness of passivation layer 220 is less than about 1.1 microns.

[0031]FIG. 13 illustrates a first embodiment of the present invention.In FIG. 13, three fuses 225A, 225B and 225C are illustrated. Fusibleportion 215 of each fuse 225A, 225B and 225C has a length “L” equal tothe width of mandrel 140. The width of each fusible portion is the sameas the width “W1” of connecting portions 210. A separate mandrel 140 isprovided for each fuse 225A, 225B and 225C. Each fuse 225A, 225B and225C, connecting portion 210 connects fusible portion 215 to contactportion 205. Each contact portion 205 is in electrical contact withconductive wire(s) 120. Fuses 225A, 225B and 225C are spaced a distance“S” apart. Also illustrated in FIG. 13, is wire 200. In one example, “L”is about 8 to 20 microns, “W1” is about 0.3 to 1.8 microns and “S” isabout 1 to 10 microns. If a laser is used to delete fusible portion 215comprised of copper, a laser with a wavelength of 1.3 microns and havinga pulse duration sufficient to provide 0.5 to 3.9 micro-joules willsuffice if the thickness of passivation layer 220 is less than about 1.1microns.

[0032]FIG. 14 illustrates a fourth embodiment of the present invention.In FIG. 14, three fuses 225A, 225B and 225C are illustrated. Fusibleportion 215 of each fuse 225A, 225B and 225C has a length “L” equal tothe width of mandrel 140. A separate mandrel 140 is provided for eachfuse 225A, 225B and 225C. The width of each fusible portion “W2” is lessthan the width “W3” of connecting portions 210. Each fuse 225A, 225B and225C, connecting portion 210 connects fusible portion 215 to contactportion 205. Each contact portion 205 is in electrical contact withconductive wire(s) 120. Fuses 225A, 225B and 225C are spaced a distance“S” apart. Also illustrated in FIG. 14, is wire 200. In one example, “V”is about 8 to 20 microns, “W2” is about 0.3 to 1.8 microns and “S” isabout 1 to 10 microns. If a laser is used to delete fusible portion 215comprised of copper, a laser with a wavelength of 1.3 microns and havinga pulse duration sufficient to provide 0.5 to 3.9 micro-joules willsuffice if the thickness of passivation layer 220 is less than about 1.1microns.

[0033] It should be noted that while mandrel 140 is necessary to thefabrication of fuse 195, the mandrel also acts to protect the underlyingdielectric and metal layers from damage caused by “deleteing” the fuse.Mandrel 140, also acts to contain the fuse blow energy, allowing lowerpower to be used, limiting collateral damage and allowing tighter pitchfuses.

[0034] The description of the embodiments of the present invention isgiven above for the understanding of the present invention. It will beunderstood that the invention is not to the particular embodimentsdescribed herein, but is capable of various modifications,rearrangements and substitutions as will now become apparent to thoseskilled in the art without departing from the scope of the invention.For example, the fuse of the present invention may be fabrication in thenext to last metal level (LM-1). Therefore, it is intended that thefollowing claims cover all such modifications and changes as fall withinthe true spirit and scope of the invention.

What is claimed is:
 1. A conductive fuse for a semiconductor device,comprising: a pair of contact portions integrally connected to a fusibleportion by connecting portions; said contact portions thicker than saidconnecting portions and said connecting portions thicker than saidfusible portion; a first dielectric under said connecting portions andsaid fusible portion and extending between said pair of contactportions; and a second dielectric between said first dielectric and saidfusible portion, said second dielectric extending between saidconnecting portions and defining the length of said fusible portion. 2.The conductive fuse of claim 1, wherein top surfaces of said contact,connecting and fusible portions are co-planer.
 3. The conductive fuse ofclaim 1, wherein said fuse comprises a conductor formed by a damasceneprocess.
 4. The conductive fuse of claim 1, wherein said fuse comprisescopper, aluminum or aluminum-copper, aluminum-copper-silicon or aluminumalloy.
 5. The conductive fuse of claim 6, wherein said fuse comprises aconductor formed by a damascene process, said conductor comprising aconductive liner and a conductive core.
 6. The conductive fuse of claim5, wherein: said conductive liner is selected from the group consistingof titanium, titanium nitride, tantalum, tantalum nitride, tungsten,tungsten nitride, chromium and layers thereof; and said core conductoris selected from the group consisting of copper, aluminum,aluminum-copper, aluminum-copper-silicon and aluminum alloys.
 7. Theconductive fuse of claim 1, wherein said second dielectric isselectively etchable with respect to said first dielectric.
 8. Theconductive fuse of claim 1, wherein: said first dielectric is selectedfrom the group consisting of silicon nitride, silicon carbide, boronnitride and aluminum oxide; and said second dielectric is selected fromthe group consisting of silicon oxide, silicon nitride, diamond,fluorine doped silicon oxide, spin on glass, porous silicon oxide,polyimide, polyimide siloxane, polysilsequioxane polymer,benzocyclobutene, paralyene, polyolefin, poly-naphthalene, fluropolymerresin, polyphenylene oligomer, methane doped silica, polymer foam andaerogel
 9. The conductive fuse of claim 1, wherein: said connectingportions are between 0.13 and 2.0 microns thick; and said fusibleportion is between 0.075 and 1.5 microns thick.
 10. A method forfabricating a fuse for a semiconductor device, comprising: providing asubstrate; forming a first dielectric layer on a top surface of saidsubstrate; forming a dielectric mandrel on a top surface of said firstdielectric layer; forming a second dielectric layer on top of saidmandrel and a top surface of said first dielectric layer; formingcontact openings down to said substrate in said first and seconddielectric layers on opposite sides of said mandrel; removing said firstdielectric layer from over said mandrel between said contact openings toform a trough; and filling said trough and contact openings with aconductor.
 11. The method of claim 10, further including removing aportion of said first dielectric layer between each contact opening andsaid mandrel.
 12. The method of claim 11, further including forming aconductive liner in said trough and contact openings and over saidmandrel.
 13. The method of claim 11, wherein said conductor comprisescopper, aluminum or aluminum-copper, aluminum-copper-silicon or aluminumalloy.
 14. The method of claim 11, wherein said dielectric mandrel isselectively etchable with respect to said first and second dielectriclayers.
 15. The method of claim 11, wherein: said dielectric mandrel isselected from the group consisting of silicon nitride, silicon carbide,boron nitride and aluminum oxide; and said first and second dielectriclayers are selected from the group consisting of silicon oxide, siliconnitride, diamond, fluorine doped silicon oxide, spin on glass, poroussilicon oxide, polyimide, polyimide siloxane, polysilsequioxane polymer,benzocyclobutene, paralyene, polyolefin, poly-naphthalene, fluropolymerresin, polyphenylene oligomer, methane doped silica, polymer foam andaerogel.
 16. A method for fabricating a fuse for a semiconductor device,comprising: providing a substrate; forming a first dielectric layer on atop surface of said substrate; forming a dielectric mandrel on a topsurface of said first dielectric layer; forming a second dielectriclayer on top of said mandrel and a top surface of said first dielectriclayer; forming, in a first region, contact openings down to saidsubstrate in said first and second dielectric layers on opposite sidesof said mandrel; removing said first dielectric layer from over saidmandrel and said first dielectric layer and a portion of said firstdielectric layer between said contact openings and said mandrel to forma trough and simultaneously, in a second region, removing said firstdielectric layer and a portion of said second dielectric to form atrench; and filling said trough and contact openings with a conductor toform a fuse and filling said trench with the conductor to form a wire.17. The method of claim 16, further including forming a conductive linerin said trough and contact openings and over said mandrel and in saidtrench.
 18. The method of claim 16, wherein said conductor comprisescopper, aluminum or aluminum-copper, aluminum-copper-silicon or aluminumalloy.
 19. The method of claim 16, wherein said dielectric mandrel isselectively etchable with respect to said first and second dielectriclayers.
 20. The method of claim 16, wherein: said dielectric mandrel isselected from the group consisting of silicon nitride, silicon carbide,boron nitride and aluminum oxide; and said first and second dielectriclayers are selected from the group consisting of silicon oxide, siliconnitride, diamond, fluorine doped silicon oxide, spin on glass, poroussilicon oxide, polyimide, polyimide siloxane, polysilsequioxane polymer,benzocyclobutene, paralyene, polyolefin, poly-naphthalene, fluropolymerresin, polyphenylene oligomer, methane doped silica, polymer foam andaerogel.
 21. A semiconductor device, comprising: a semiconductorsubstrate having integrated circuits; and at least one fuse, said fusecomprising: a pair of contact portions integrally connected to a fusibleportion by connecting portions; said contact portions thicker than saidconnecting portions and said connecting portions thicker than saidfusible portion; a first dielectric under said connecting portions andsaid fusible portion and extending between said pair of contactportions; and a second dielectric between said first dielectric and saidfusible portion, said second dielectric extending between saidconnecting portions and defining the length of said fusible portion 22.The device of claim 21, wherein top surfaces of said contact, connectingand fusible portions are co-planer.
 23. The device of claim 21, whereinsaid fuse comprises a conductor formed by a damascene process.
 24. Thedevice of claim 21, wherein said fuse comprises copper, aluminum oraluminum-copper, aluminum-copper-silicon or aluminum alloy.
 25. Thedevice of claim 21, wherein said fuse comprises a conductor formed by adamascene process, said conductor comprising a conductive liner and aconductive core.
 26. The device of claim 25, wherein: said conductiveliner is selected from the group consisting of titanium, titaniumnitride, tantalum, tantalum nitride, tungsten, tungsten nitride,chromium and layers thereof; and said core conductor is selected fromthe group consisting of copper, aluminum, aluminum-copper,aluminum-copper-silicon and aluminum alloys.
 27. The device of claim 21,wherein said second dielectric is selectively etchable with respect tosaid first dielectric.
 28. The device of claim 21, wherein: said firstdielectric is selected from the group consisting of silicon nitride,silicon carbide, boron nitride and aluminum oxide; and said seconddielectric is selected from the group consisting of silicon oxide,silicon nitride, diamond, fluorine doped silicon oxide, spin on glass,porous silicon oxide, polyimide, polyimide siloxane, polysilsequioxanepolymer, benzocyclobutene, paralyene, polyolefin, poly-naphthalene,fluropolymer resin, polyphenylene oligomer, methane doped silica,polymer foam and aerogel.
 29. The device of claim 21, wherein: saidconnecting portions are between 0.13 and 2.0 microns thick; and saidfusible portion is between 0.075 and 1.5 microns thick.